Sense amplifier circuit of a nonvolatile semiconductor memory de

Details Sense amplifier circuit of a nonvolatile semiconductor memory de Sense amplifier circuit of a nonvolatile semiconductor memory de

1996-06-13

1998-06-02

Yoo, Do Hyun

Static information storage and retrieval

Floating gate

Particular biasing

36518525, 365202, 365203, 365207, G11C 700

Patent

active

057611238

ABSTRACT:
A sense amplifier circuit for a nonvolatile semiconductor memory device, with NAND structured cells, includes a bit line isolation section located between a pair of bit lines connected to a memory cell array and a pair of sub-bit lines connected to an input/output gate circuit, a latch type voltage-controlled current source having n-channel MOS transistors connected to the sub-bit lines, and a switching section connected between the voltage-controlled current source and a signal line. The bit lines are electrically isolated from the sub-bit lines by provision of a bit line isolation section receiving an isolation control signal during the sensing operation. The sense amplifier circuit sensing operation is not affected by bit line load impedance and, accordingly, the sensing speed is improved and peak current is reduced.

REFERENCES:
patent: 5444662 (1995-08-01), Tanaka et al.
patent: 5477497 (1995-12-01), Park et al.
patent: 5491435 (1996-02-01), Mun et al.
patent: 5539701 (1996-07-01), Shimizu

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