Sense amplifier circuit for semiconductor memory

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

365208, 307530, G11C 1140

Patent

active

048021385

ABSTRACT:
A sense amplifier circuit comprises a first amplifier circuit for detecting the data from a memory cell and generating an output signal in accordance with the detected data, a first load MOS transistor of one conductivity type connected between an output terminal of the first amplifier circuit and a power source terminal, a second amplifier circuit for detecting the data from a dummy cell and generating an output signal in accordance with the detected data, a second load MOS transistor of one conductivity type and a third load MOS transistor, which are connected in parallel between an output terminal of the second amplifier circuit and the power source terminal, and a comparator for comparing the output signals from the first and second amplifier circuits and generating an output signal in accordance with the result of the comparison. The third load MOS transistor is a MOS transistor of an opposite conductivity type whose back gate is connected to a reference potential terminal.

REFERENCES:
patent: 4434479 (1984-02-01), Chen et al.
Tanaka et al., "A Programmable 256K CMOS EPROM with On-Chip Test Circuits", IEEE International Solid-State Circuits Conference, ISSCC Digest of Technical Papers, pp. 148-149, Feb. 23, 1984.

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