Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2007-12-25
2007-12-25
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S196000
Reexamination Certificate
active
10870289
ABSTRACT:
A semiconductor device memory device (300) can include a sense amplifier (302) enabled according to a first sense signal (setn) and a second sense signal (setp). In a sense operation, a first sense signal (setn) can be driven to a first, below ground potential. Subsequently, in the same sense operation, the first sense signal (setn) can be raised and maintained at a ground potential. Such an approach can substantially eliminate a sense amplifier stall condition that can occur under low temperature and/or low voltage operation. According to another aspect of the embodiments, a more negative logical “0” value can be written back into the memory cell during an access and/or refresh operation. This more negative value is available due to the below ground level provided during a sense operation.
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Chapman David
Parent Richard
Cypress Semiconductor Corporation
Haverstock & Owens LLP
Le Thong Q.
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