Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1988-08-05
1992-01-07
Bowler, Alyssa H.
Static information storage and retrieval
Read/write circuit
Differential sensing
36518907, 36518909, 365210, G11C 700, G11C 11409
Patent
active
050797450
ABSTRACT:
A voltage amplifier comprises a pair of bit lines (B1, B2) connected to a dummy cell and a plurality of memory cells; a pair of n channel MOS transistors (Q1, Q2) connected between the pair of bit lines and an I/O line each operating in response to the potential of the other bit line; and a pair of p channel MOS transistors (Q5, Q6) connected between the pair of n channel MOS transistors (Q1, Q2) and the bit lines (B1, B2) operating in response to the ground potential. As the voltage difference of the pair of bit lines is amplified, the p channel MOS transistor connected to the bit line held at the lower potential turns on, and the connection between the bit line and the n channel MOS transistor is cut off.
REFERENCES:
patent: 3940747 (1976-02-01), Kuo et al.
patent: 4053873 (1977-10-01), Freeman
patent: 4291392 (1981-09-01), Proebsting
patent: 4586171 (1986-04-01), Fujishima
patent: 4604732 (1986-08-01), van Tran
patent: 4730280 (1988-03-01), Aoyama
IEEE Journal of Solid State Circuits, vol. SC-16, No. 5, Oct. 1981, pp. 479-487.
IBM Technical Disclosure Bulletin, vol. 27, No. 4B, Sep. 1984, pp. 2632-2635.
Ito Junko
Miyamoto Takayuki
Bowler Alyssa H.
Mitsubishi Denki & Kabushiki Kaisha
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