Semiconductor wafer with electrically connected contact and...

Details Semiconductor wafer with electrically connected contact and... Semiconductor wafer with electrically connected contact and...

2003-07-29

2011-10-25

Malsawma, Lex (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S499000, C257S775000, C257SE23010

Reexamination Certificate

active

08044394

ABSTRACT:
The invention relates to an arrangement of contact areas and test areas on patterned semiconductor chips. The contact areas and the test areas are electrically connected to one another via a conduction web. Whereas the contact areas are arranged in a first region, which has no components of an integrated circuit, the test areas lie in a second region of the top side of the semiconductor chip, which region has components of an integrated circuit.

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