Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2001-07-26
2003-05-13
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257S782000, C257S791000
Reexamination Certificate
active
06563196
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor wafer, a semiconductor device and a manufacturing method therefor. In particular the invention relates to the structure of a dicing section of a semiconductor wafer, a dicing method for chip separation, and the structure of the edge section of a semiconductor device.
2. Description of the Related Art
Miniaturization of the structure of semiconductor elements such as insulated gate field effect transistors (hereunder referred to as MOS transistors) and the like is still advancing rapidly. Regarding miniaturization, semiconductor elements using dimensions around 0.1 &mgr;m through 0.2 &mgr;m are being researched currently, and ULSI semiconductor devices containing 16 Gb generation DRAM, super high-speed logic, or both, using these sizes as their design rules, are in research and development.
For high levels of integration, high speed, high performance, and additional multiple functions of semiconductor devices, high density semiconductor chip mounting techniques for mounting semiconductor devices play an important role, along with fine processing techniques for manufacturing the semiconductor devices. Especially in recent years, for use in portable equipment, it has been important to mount semiconductor chips using multi chip package (MCP) techniques, which contain two or more chips in one package, chip scale package (CSP) techniques or the like, and semiconductor integrated circuit (IC) miniaturization.
To develop the high density mounting techniques mentioned above, it is necessary to form a protective insulation film using a resin film on semiconductor wafers that contain semiconductor devices. At present therefore, a photosensitive resin film such as polyimide resin film is formed on the abovementioned semiconductor wafers.
Furthermore, such a resin film is recognized as having a role in preventing defects (chipping) on the surface of semiconductor chips in a process where semiconductor wafers are diced to separate the semiconductor chips.
Accordingly, the abovementioned resin film for protecting semiconductor chips is formed such that it coats the whole surface of the dicing section (dicing street) of the semiconductor wafer, and the semiconductor wafer is cut by a diamond blade along this dicing street. For example, this technique is described in Japanese Unexamined Patent Application First Publication No. 62-063446 and Japanese Unexamined Patent Application First Publication No. 62-112348.
Hereunder is a description of the conventional technique, with reference to the figures.
FIG. 8
is a partial plan view of a semiconductor wafer. Here, the edge sections of four chips are shown. Furthermore for clarity, diagonal lines are drawn on the resin films coating the semiconductor wafer.
As shown in
FIG. 8
, semiconductor element regions
102
,
102
a
,
102
b
, and
102
c
, being semiconductor chips, are formed on a semiconductor wafer
101
. Here, bonding pads
103
are formed on the edge section of each semiconductor element region. A resin film
105
is formed over the whole surface, except at openings
104
provided on the bonding pads
103
. Here, a dicing street
106
, being a boundary region provided for chip separation, is formed with a predetermined width between the semiconductor element regions
102
,
102
a
,
102
b
and
102
c
, and the resin film is formed coating the whole surface of this dicing street
109
.
In the case where the semiconductor wafer is diced to form semiconductor chips, the semiconductor wafer is cut by a diamond blade along a separation line
107
shown by dashed lines in FIG.
8
. Here, the diamond blade is applied on top of the resin film covering the dicing street
106
, and the semiconductor wafer is cut through this resin film.
However, the conventional technique described above is known to have the following problems. If the resin film
105
is formed on the dicing street
106
, it will certainly reduce chipping in the semiconductor wafer cutting process. However, when the present inventor performed a detailed examination of the semiconductor chips after the semiconductor wafer had been cut, it was seen that considerable chipping could occur easily on the reverse side of the semiconductor chips.
Normally, after finishing the first half of a semiconductor device manufacturing process (diffusion process), the reverse face of the semiconductor wafer is ground to a thickness of a little under 300 &mgr;m. After the above treatment, the semiconductor wafer is diced. The semiconductor wafer of a semiconductor integrated circuit (IC) that has high performance or multiple functions has a lower thickness after grinding. As a result, when manufacturing the abovementioned leading edge semiconductor integrated circuits (IC), chipping on the reverse face of the semiconductor chips after cutting as mentioned above easily causes problems such as poor contact with jigs in the semiconductor chip mounting process (part of the latter half of the process), for example a die bonding process. Such problems are even more acute in mounting of the abovementioned MCP.
Therefore, to solve the abovementioned problem of the conventional technique, as shown in FIG.
9
(
a
), a method is proposed in that a resin film
105
a
is formed in the semiconductor element regions
102
,
102
a
,
102
b
, and
102
c
, and the one on the dicing street
106
is removed. The semiconductor wafer is then cut along the separation line
107
to form semiconductor chips.
However, in this case, as shown in FIG.
9
(
b
), a big problem occurs in the connection of bonding wires when mounting the semiconductor chips formed by cutting the semiconductor wafer. To describe an outline of a semiconductor chip
108
as shown in FIG.
9
(
b
): an inorganic insulation film
110
is formed on a semiconductor substrate
109
on which semiconductor elements are formed, bonding pads
103
are formed on its upper section, and a resin film
105
a
with openings
104
is formed on the top. A bonding wire
112
is connected between a tape substrate or a stitch
111
mounted on the substrate and the bonding pad
103
. However, this bonding wire
112
can bend easily and become a deformed wire
113
, which causes it to make contact with the edge of the semiconductor chip
108
. Here, in the method described in FIG.
9
(
a
), since the surface of the semiconductor substrate
109
is exposed on the dicing street
106
, the bonding wire
112
causes a short-circuit to the semiconductor substrate
109
, which prevents the semiconductor device from operating. That is to say, edge contact of the bonding wire occurs easily, and defective semiconductor integrated circuits (IC) are likely to be produced frequently.
SUMMARY OF THE INVENTION
An object of the present invention is to suppress chipping on the reverse face of semiconductor chips during semiconductor wafer dicing. Another object of the present invention is to make it possible to easily prevent the abovementioned edge contact.
Therefore, a semiconductor wafer of the present invention has a plurality of semiconductor chips and boundary regions provided for chip separation, wherein a resin film pattern is formed on a part of the boundary regions matching bonding pads of each chip. Alternatively, a semiconductor wafer of the present invention has a plurality of semiconductor chips and boundary regions provided for chip separation, wherein a resin film pattern is formed with a predetermined width on the periphery of the boundary regions.
Furthermore, in a semiconductor device manufacturing method of the present invention, a resin film is coated onto the periphery of boundary regions provided for chip separation on a semiconductor wafer, and the semiconductor wafer is cut along the central part of the boundary regions. Here the width of the periphery of the boundary regions is greater than 10 &mgr;m.
Furthermore, in a semiconductor device of the present invention, wherein semiconductor elements are formed on a semiconductor substrate, a resin film pattern is f
NEC Electronics Corporation
Rose Kiesha
Zarabian Amir
LandOfFree
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