Electricity: electrical systems and devices – Electric charge generating or conducting means – Use of forces of electric charge or field
Reexamination Certificate
2001-09-06
2003-04-15
Jackson, Stephen W. (Department: 2836)
Electricity: electrical systems and devices
Electric charge generating or conducting means
Use of forces of electric charge or field
C361S220000
Reexamination Certificate
active
06549393
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a wafer stage and a processing apparatus and a processing method which use the wafer stage. In particular, it relates to, for example, the wafer stage which permits uniform and very accurate control of the temperature of a wafer as a substrate to be processed.
In recent years, circuit patterns have become finer steadily with an enhancement of the degree of integration of semiconductor devices, so that the dimensional accuracy in fabrication has required to become higher and higher. In such a situation, it is very important to control the temperature of a wafer under processing.
For example, in an etching process that is required to give a high aspect ratio, etching is conducted while protecting the sidewall with an organic polymer in order to realize anisotropic etching. In the process, the production of the organic polymer as a protective film changes with temperature. Therefore, if the temperature distribution of a wafer under processing is not uniform, the thickness of the sidewall protective film produced is not uniform depending on a position on the wafer surface, so that the shape of etched portion is not uniform.
In recent semiconductor production processes, the diameter of a wafer is increased in order to reduce the production cost, and the heat input to the wafer tends to be increased more and more. Therefore, controlling the temperature of the wafer surface uniformly is a very important technical problem. For example, in a process of etching an interlaminar insulating film in a processing line in which the diameter of a wafer is 300 mm, a bias electric power applied to the wafer reaches about 3 kW and the wafer is heated by this electric power.
The wafer under plasma treatment in the above-mentioned production process is electrostatically attracted and held on a stage by means of an electrostatic chuck. The aforesaid wafer is cooled by introducing a thermally conductive gas (usually, helium) into the space between the wafer and the stage.
The structure of the electrostatic chuck is varied depending on the specifications of each apparatus. In general, the structure is such that a ceramic film of about 1 mm or less in thickness is attached to the surface of a metal good in thermal conduction used as a base, such as aluminum. Refrigerant flow paths are provided in the base metal, and the electrostatic chuck is cooled by allowing a refrigerant whose temperature is controlled by means of a thermoregulator provided outside the apparatus, to flow along the aforesaid flow paths.
The permissible temperature range of a wafer to be controlled varies depending on a process. For example, the temperature of a stage for holding the wafer is required to be stable in a wide temperature range from a low temperature of about −40° C. to a high temperature of about 100° C. That is, the wafer stage of a plasma treatment apparatus is required to realize a uniform temperature distribution in a wide temperature range on the whole surface of a wafer having a large diameter, even at a high heat input.
However, in a stage having such a structure as is described above, the thermal expansion coefficients of the base metal and the dielectric film are widely different. Therefore, no problem is caused when the working temperature is approximately 20° C. to 40° C. However, in a temperature range of 80° C. to 100° C., a high thermal stress is generated in the dielectric film owing to the difference between the thermal expansion coefficients of the base metal and the dielectric film, so that the film is broken in some cases. In this case, the stage should be replaced after stopping an apparatus.
JP-A-11-176919 discloses a wafer stage capable of solving the above problem. In the apparatus disclosed therein, a ceramic sintered product is attached to a composite material of aluminum and a ceramic by brazing; an electroconductive brazing material or a metal with a thermal expansion coefficient close to that of a dielectric film, such as titanium or molybdenum is embedded as the electrode of an electrostatic chuck in the ceramic sintered product; and a dielectric layer is formed on the surface of the ceramic sintered product.
FIG. 12
is a diagram showing a plasma treatment apparatus using another conventional wafer stage, and
FIG. 13
is an enlarged view of the wafer stage shown in FIG.
12
.
First, an etching gas
11
is introduced into a vacuum chamber
9
, and the pressure inside the vacuum chamber
9
is maintained at a suitable pressure by adjusting the opening of a valve
12
provided upstream to a turbo-molecular pump
13
. A parallel-plate upper electrode
10
is located over a wafer stage
2
in the vacuum chamber
9
. Plasma
6
is generated in the vacuum chamber by applying a high-frequency voltage of 13.56 MHz to the upper electrode
10
by using a high-frequency power source
8
.
Etching can be conducted by exposing a wafer
1
to the plasma. The wafer is set on the wafer stage
2
located so as to face the upper electrode. The wafer stage
2
is fixed on an insulating member
7
fixed on a flange
5
, by means of bolts
19
, and is electrically insulated from the vacuum chamber
9
. The wafer stage
2
is such that a 1-mm thick dielectric film
21
composed mainly of a ceramic is attached to the surface of a base material
17
made of aluminum, by flame spraying or the like.
A through-hole
14
for introducing helium gas is provided in the center of the wafer stage. The flow rate of the gas introduced can be adjusted by controlling a flow rate regulator
25
on the basis of a value measured with a pressure gage
24
attached to a gas piping
23
under the reverse side of the wafer.
In the peripheral portion of the wafer stage, twelve bolt holes for fixing on the insulating member are provided in the peripheral direction. On the reverse side of the base material, refrigerant grooves are provided in concentric circles. The above-mentioned flange
5
is fixed on the vacuum chamber
9
by means of bolts
4
. An O-ring
3
prevents a refrigerant for cooling the wafer stage from leaking into the treatment chamber.
The wafer stage
2
is connected to an external high-frequency power source
20
while being electrically insulated from the flange by an insulating material
18
. For example, a high-frequency bias voltage of 800 kHz is applied to the wafer stage
2
. Thus, a bias voltage is generated in the wafer, so that ions can be effectively introduced into the wafer. Accordingly, the etching capability can be improved: for example, anisotropic etching can be realized, and the etching rate can be increased.
However, in the method described above, the ions heat the wafer simultaneously with their introduction into the wafer. Therefore, the wafer should be externally cooled. The wafer stage
2
can be cooled by circulating a refrigerant controlled at a definite temperature, from a refrigerator provided outside the vacuum chamber
9
, to the refrigerant grooves
15
provided in the base material
17
. However, under usual etching conditions, the pressure inside the treatment chamber is some pascals. Since the pressure is low, the thermal resistance between the wafer and the wafer stage is high, so that the wafer cannot be sufficiently cooled. Therefore, the cooling efficiency is usually improved by introducing an inert and thermally conductive gas such as helium gas into the space between the wafer and the wafer stage. Usually, the pressure of the gas is approximately 500 Pa to 2 kPa. In order to prevent the wafer from moving to a position different from that of the wafer stage owing to the gas pressure, the wafer is electrostatically attracted on the wafer stage by applying a direct-current voltage to the wafer stage from a direct-current power source
22
. The wafer is substantially at earth potential because it is in contact with the plasma. Therefore, a potential difference is made in the dielectric film
21
between the wafer and the wafer stage owing to the direct-current power source
22
, and the wafer is electrostatically attracted
Kanai Saburo
Kanno Seiichiro
Kawahara Hironobu
Suehiro Mitsuru
Yoshioka Ken
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Jackson Stephen W.
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