Semiconductor wafer having electrically connected passive...

Details Semiconductor wafer having electrically connected passive... Semiconductor wafer having electrically connected passive...

2007-05-01

2007-05-01

Lee, Hsien-Ming (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S613000

Reexamination Certificate

active

11199163

ABSTRACT:
A semiconductor wafer includes a plurality of passive device units, which are electrically connected across scribe lines. Passive device chips in the wafer that are adjacent to one another in a first direction are electrically connected in parallel, while passive device units adjacent to one another in a second direction are connected in series. By selecting a number of adjacent passive device units extending in the first and second direction, and separating the selected units from the wafer along the corresponding scribe lines, a passive device chip having a desired electrical characteristic (e.g., capacitance or resistance) can be obtained. Such passive device chips may be assembled in a semiconductor package where they are electrically connected to active devices.

REFERENCES:
patent: 5528083 (1996-06-01), Malladi et al.
patent: 5593901 (1997-01-01), Oswald et al.
patent: 2006/0079027 (2006-04-01), Yamada et al.
patent: 11-003969 (1999-01-01), None
patent: 11-260999 (1999-09-01), None
patent: 2001-102512 (2001-04-01), None
patent: 1999-0086685 (1999-12-01), None
patent: 2000-0008455 (2000-02-01), None

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