Electric heating – Metal heating – By arc
Reexamination Certificate
2003-03-19
2004-06-29
Heinrich, Samuel M. (Department: 1725)
Electric heating
Metal heating
By arc
C219S121720
Reexamination Certificate
active
06756562
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2003-004767, filed Jan. 10, 2003, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device manufacturing method and apparatus to discretely divide a semiconductor wafer into semiconductor chips (semiconductor elements) after elements are formed in the semiconductor wafer and more particularly to a technique for discretely dividing the semiconductor wafer.
2. Description of the Related Art
Conventionally, when a semiconductor wafer on which elements have been formed is discretely divided to form semiconductor chips, mechanical cutting (dividing by cutting using a diamond blade or grindstone), dividing by forming cut grooves and breaking, dividing by breaking with distortions and scratches used as starting points by use of a scriber (refer to Jpn. Pat. Appln. KOKOKU Publication No. H05-54262, for example), cutting by application of a laser beam, dividing by use of a combination of application of a laser beam and distortion (refer to Jpn. Pat. Appln. KOKAI Publication No. P2002-192367, for example) and the like are used.
FIGS. 1A and 1B
show an extracted part of the conventional semiconductor device manufacturing process described above,
FIG. 1A
being a perspective view showing a step of forming cut grooves in a semiconductor wafer by use of a diamond blade and
FIG. 1B
being a cross sectional view showing a back-side grinding step. First, as shown in
FIG. 1A
, grooves
13
-
1
,
13
-
2
,
13
-
3
, . . . for dividing are formed (half-cut) along dicing lines or chip dividing lines on an element forming surface
11
A side of a semiconductor wafer
11
on which elements have been formed. After this, a protection film
14
is affixed to the element forming surface
11
A of the semiconductor wafer
11
and then, as shown in
FIG. 1B
, a rear surface portion
11
B of the semiconductor wafer
11
is ground to at least a depth &Dgr;0 which reaches the grooves
13
-
1
,
13
-
2
,
13
-
3
, . . . to divide the semiconductor wafer
11
into discrete semiconductor chips
11
-
1
,
11
-
2
,
11
-
3
, . . . .
Alternatively, a dicing tape is affixed to the rear surface
11
B of the semiconductor wafer
11
which is opposite to the element forming surface
11
A and the semiconductor wafer is cut (full cut) along the dicing lines or chip dividing lines by use of the diamond blade
12
in some cases.
However, in the mechanical cutting process such as the blade dicing process, cutting streaks (scratches or distortions) may occur on the side surface of the semiconductor chip as shown in FIG.
2
A. Further, chippings may occur on the element forming surface (also on the rear surface in the case of full cut) as shown in FIG.
2
B.
This applies to a case wherein scratches or distortions are formed by use of a scriber and the semiconductor wafer is divided by breaking and, as shown in
FIG. 3A
, scratches (less than 5 &mgr;m) or distortions (approximately several &mgr;m) may occur on the side surface of the semiconductor chip. Further, as shown in
FIG. 3B
, chippings may occur on the element forming surface.
In the cutting process by application of a laser beam, occurrence of cutting streaks and chippings by mechanical cutting can be prevented, but distortions (damages) occur on the side surface of the semiconductor chip as shown in FIG.
4
A. Further, as shown in
FIG. 4B
, the side surface of the semiconductor chip becomes uneven and the mechanical strength is lowered. In addition, melted Si is re-crystallized so that adjacent elements will tend to interfere with each other, thereby causing chippings to occur. Further, there occurs a problem that the element characteristic is deteriorated (for example, the pause characteristic of a DRAM is degraded) or a melted portion is attached to the wiring surface by heat generated at the time of laser application.
Thus, in the conventional semiconductor device manufacturing method and apparatus, when the semiconductor wafer is cut and divided into discrete semiconductor chips, cutting streaks (scratches or distortions) may occur on the side surface of the semiconductor chip, damages by heat may occur, the characteristic of the semiconductor chip may be deteriorated, faults may occur and the resistance to bending or breaking may be lowered. Further, even if the semiconductor chip does not become faulty, cutting streaks and uneven portions caused by application of the laser beam will remain on the peripheral portion of the semiconductor chip and the shape and quality thereof are poor.
BRIEF SUMMARY OF THE INVENTION
A semiconductor device manufacturing apparatus according to an aspect of the invention comprises a damage forming equipment which forms damage layers used as starting points to divide a semiconductor wafer into discrete semiconductor chips on a rear surface side of the semiconductor wafer which is opposite to an element forming surface, a dividing equipment which divides the semiconductor wafer into discrete semiconductor chips with the damage layers used as the starting points, and a removing equipment which removes a rear surface portion of the semiconductor wafer to at least a depth where the damage layers are no more present.
A semiconductor device manufacturing method according to another aspect of the invention comprises forming a damage layer used as starting points to divide a semiconductor wafer into discrete semiconductor chips on a rear surface side of the semiconductor wafer which is opposite to an element forming surface, dividing the semiconductor wafer into discrete semiconductor chips with the damage layer used as the starting points, and removing a rear surface portion of the semiconductor wafer to at least a depth where the damage layer is no more present.
REFERENCES:
patent: 4224101 (1980-09-01), Tijburg et al.
patent: 5888883 (1999-03-01), Sasaki et al.
patent: 6184109 (2001-02-01), Sasaki et al.
patent: 6294439 (2001-09-01), Sasaki et al.
patent: 6337258 (2002-01-01), Nakayoshi et al.
patent: 6586707 (2003-07-01), Boyle et al.
patent: 198 11 115 (1999-09-01), None
patent: 198 410 508 (1999-12-01), None
patent: 1 022 778 (2000-07-01), None
patent: 1 026 735 (2000-08-01), None
patent: 5-54262 (1993-08-01), None
patent: 2002-192367 (2002-07-01), None
Shinya Takyu et al., “Wafer Splitting Method Using Cleavage”, Ser. No. 10/306,008, filed Nov. 29, 2002.
Kurosawa Tetsuya
Sato Ninao
Takyu Shinya
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Heinrich Samuel M.
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