Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure
Reexamination Certificate
2000-03-09
2001-10-16
Zarabian, Amir (Department: 2824)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
Having specified scribe region structure
C438S460000, C438S113000
Reexamination Certificate
active
06303470
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for manufacturing semiconductor devices, and particularly, the present invention relates to a semiconductor wafer and to method for dividing a semiconductor wafer which is covered by an opaque resin in a dicing process.
BACKGROUND OF THE INVENTION
A method has been proposed for the manufacture semiconductor devices which includes a step of covering a semiconductor wafer with a resin before a step of separating the semiconductor devices from a semiconductor wafer.
An example is disclosed in “NIKKEI MICRODEVICES, pp.164-167”, published on April, 1998. However, in a step of separating semiconductor chips from a semiconductor wafer which is covered by a resin according to the publication, it is difficult to precisely identify cutting points since a surface of the semiconductor wafer is covered by an opaque resin.
SUMMARY OF THE INVENTION
An object of this invention is to provide a method for manufacturing in which is possible to recognize grid lines which are hidden by an opaque resin.
To achieve the object, one aspect of the invention includes a step of forming marks on a semiconductor wafer, wherein the marks are distinguished from electrodes which are formed on the semiconductor wafer.
According to the invention, in a dicing process, separating semiconductor chips from the semiconductor wafer can be precisely achieved. That is, it is possible to realize a manufacturing process of good quality.
REFERENCES:
patent: 5430325 (1995-07-01), Sawada et al.
patent: 5960286 (1999-09-01), Minami et al.
patent: 6207473 (2001-03-01), Hirai et al.
patent: 2-65153 (1990-03-01), None
patent: 7-6982 (1995-01-01), None
patent: 7-106638 (1995-04-01), None
patent: 7-509104 (1995-10-01), None
patent: 9-199588 (1997-07-01), None
patent: 10-275919 (1998-10-01), None
Nikkei Microdevices, pp. 164-167, Apr. 1998.
Kato Yuzo
Ohsumi Takashi
Jones Volentine PLLC
OKI Electric Industry Co., Ltd.
Pyonin Adam
Zarabian Amir
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