Semiconductor wafer and manufacturing process thereof

Details Semiconductor wafer and manufacturing process thereof Semiconductor wafer and manufacturing process thereof

2006-07-11

2006-07-11

Tran, Thien F. (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S208000, C257S209000, C257S620000, C257S665000

Reexamination Certificate

active

07075107

ABSTRACT:
A semiconductor wafer includes a wafer body, a plurality of analog IC dies spacedly and alignedly formed on the wafer body to define a scribe line as a margin formed between each two dies wherein each of the dies has an internal circuit formed therewithin and at least a terminal pad formed along the scribe line, and a conductive arrangement including at least a conductive element formed on the wafer body to electrically connect the terminal pad with the internal circuit of the die in such a manner that when the die is cut off from the wafer body along the scribe line, the terminal pad is cut off from the die so as to keep the internal circuit in the die.

REFERENCES:
patent: 6492666 (2002-12-01), Terada et al.

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