Semiconductor wafer analysis system

Image analysis – Applications – Manufacturing or product inspection

Reexamination Certificate

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Details

C324S750010, C324S757030, C324S762050, C382S144000

Reexamination Certificate

active

08009895

ABSTRACT:
A semiconductor wafer analysis system is provided. In an embodiment, the semiconductor wafer analysis system includes a tester to test semiconductor wafers manufactured by at least one manufacturing facility, a wafer map generation module to generate wafer maps on the basis of the test results from the tester, and a wafer analysis module. The wafer analysis module may include a data generation module that divides each wafer map into a plurality of defect analysis regions and generates feature vectors representing the semiconductor wafers, and an operation module that statistically analyzes the feature vectors.

REFERENCES:
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patent: 10-214866 (1998-08-01), None
patent: 2001-156135 (2001-06-01), None
patent: 2005-0068119 (2005-07-01), None
English language abstract of Korean Publication 2005-0068119, May 7, 2005.
English language abstract of Japanese Publication No. 10-214866, Nov. 8, 1998.

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