Semiconductor test system

Details Semiconductor test system Semiconductor test system

1998-12-18

2001-06-26

Metjahic, Safet (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB, C714S735000

Reexamination Certificate

active

06252416

ABSTRACT:

FIELD OF THE INVENTION
The present invention concerns a semiconductor test system for testing a semiconductor device.
BACKGROUND OF THE INVENTION
FIG. 1
schematically shows a distorted signal including hump and undershoot noises. Semiconductor devices such as dynamic random access memory (DRAM) are assembled as modules in an electronic system, where a signal may be distorted by hump or undershoot noises caused by impedance mismatching or asymmetric line (difference of trace length) in the practical environment. The semiconductor device may malfunction by a distorted signal containing hump or undershoot noises. For example, if hump noises enter a row address strobe signal RAS' that is a master signal of DRAM, multiple word lines may be selected or the refresh counter may malfunction to fail the refresh operation of a certain cell. Moreover, the column address strobe CAS' may be precharged before or after precharging the row address strobe RAS', which may cause a word line glitch due to activation of the address by the hump noises, and other problems. The hump signal may also affect the column address strobe CAS' to result in malfunction of the device, as the distorted row address strobe RAS'. Moreover, the initially generated undershoot may cause a secondary undershoot resulting in inadvertent operation of the semiconductor device.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor test system having means for supplying a tested semiconductor with a possible noise signal occurring during use in a practical environment.
According to an embodiment of the present invention, a semiconductor test system for testing a semiconductor device, comprises a plurality of pins mounted in the semiconductor device to pass electrical signals, and a test equipment for generating a plurality of different test signals to test the semiconductor device based on the signals generated from the semiconductor device in response to the test signals, wherein at least two of the different signals are simultaneously supplied to one of the pins. The two different signals serve as a noise signal to the semiconductor device.
The present invention will now described more specifically with reference to the drawings attached only by way of examples.


REFERENCES:
patent: 5065091 (1991-11-01), Tobita
patent: 5146161 (1992-09-01), Kiser
patent: 5608337 (1997-03-01), Hendricks et al.

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