Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2006-11-21
2006-11-21
Smith, Zandra V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S018000, C438S933000
Reexamination Certificate
active
07138650
ABSTRACT:
A semiconductor substrate, a field effect transistor and their manufacturing methods provided with, in order to lower penetrating dislocation density and reduce surface roughness to a practical level, an Si substrate1, a first SiGe layer2on the Si substrate, and a second SiGe layer3arranged on the first SiGe layer either directly or with an Si layer in between; wherein, the first SiGe layer has a film thickness that is thinner than twice the critical film thickness, which is the film thickness at which dislocation occurs resulting in lattice relaxation due to increased film thickness, the Ge composition ratio of the second SiGe layer is at least lower than the intralayer maximum value of the Ge composition ratio in the first SiGe layer or in the first SiGe layer at the contact surface with the Si layer, and the second SiGe layer has an incremental composition region in which the Ge composition ratio gradually increases towards the surface at least in a portion thereof.
REFERENCES:
patent: 5221413 (1993-06-01), Brasen et al.
patent: 5442205 (1995-08-01), Brasen et al.
patent: 5534713 (1996-07-01), Ismail et al.
patent: 5663516 (1997-09-01), Mishima et al.
patent: 5906951 (1999-05-01), Chu et al.
patent: 6059895 (2000-05-01), Chu et al.
patent: 6339232 (2002-01-01), Takagi
patent: 6369438 (2002-04-01), Sugiyama et al.
patent: 2002/0052084 (2002-05-01), Fitzgerald
patent: 2002/0125475 (2002-09-01), Chu et al.
patent: 1289149 (2001-03-01), None
patent: 100 11 054 (2000-09-01), None
patent: 0 683 522 (1995-11-01), None
patent: 6-252046 (1994-09-01), None
patent: 07-321222 (1995-12-01), None
patent: 08-037291 (1996-02-01), None
patent: 09-180999 (1997-07-01), None
patent: 10-308503 (1998-11-01), None
patent: 2000-286413 (2000-10-01), None
patent: 1998-081556 (1998-11-01), None
patent: 388969 (2000-05-01), None
patent: WO 98/00857 (1998-01-01), None
Korean Office Action issued in Korean Application No. 10-2004-7001728 dated Oct. 31, 2005.
Yutani and Shiraki, “Hybrid MBE growth and mobility limiting factors ofn-channel Si/SiGe modulation-doped systems”, Journal of Crystal Growth, 175/176 pp. 504-508 (1997).
Li et al., “Effect of low-temperature SiGe interlayer on the growth of relaxed SiGe”, Journal of Crystal Growth, 213, pp. 308-311 (2000).
Mizushima Kazuki
Shiono Ichiro
Yamaguchi Kenji
Pillsbury Winthrop Shaw & Pittman LLP
Smith Zandra V.
Sumitomo Mitsubishi Silicon Corporation
Tran Thanh Y.
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