Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2006-09-12
2009-10-06
Jackson, Jr., Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C257SE21524, C257SE21530
Reexamination Certificate
active
07598522
ABSTRACT:
A semiconductor substrate includes a wafer, a first stepped structure formed of plural stepped parts formed on a surface of the wafer with a first area occupation ratio, a second stepped structure formed of plural stepped parts formed on the surface of the wafer with a second, different area occupation ratio, and an interlayer insulation film formed on the surface so as to cover the first and second stepped structures, the interlayer insulation film having a planarized top surface, wherein there are provided at least first and second film-thickness monitoring patterns for monitoring film thickness on the surface in a manner covered by the interlayer insulation film, a first pattern group is formed on the surface such that the first pattern group comprises plural patterns disposed so as to surround the first film-thickness monitoring pattern, a second pattern group is formed on the surface such that the second pattern group comprises plural patterns disposed so as to surround the second film-thickness monitoring pattern, the first film-thickness monitoring pattern and the first pattern group having a third area occupation ratio on the surface, while the second film-thickness monitoring pattern and the second pattern group having a fourth area occupation ratio on the surface, wherein the third area occupation ratio is different from the fourth area occupation ratio.
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Korean Office Action dated Mar. 11, 2008, for corresponding Korean Patent Application.
Nagai Kouichi
Yaegashi Tetsuo
Budd Paul A
Fujitsu Microelectronics Limited
Jackson, Jr. Jerome
Kratz Quintos & Hanson, LLP
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