Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2011-03-29
2011-03-29
Toledo, Fernando L (Department: 2895)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S622000, C438S640000, C257S295000, C257S296000, C257S310000, C257S303000, C257S532000
Reexamination Certificate
active
07915172
ABSTRACT:
A semiconductor substrate includes a wafer including an element area and a non-element area delineating the element area, a first layered structure situated in the element area, a first insulating film covering the first layered structure, and exhibiting a first etching rate with respect to an etching recipe, a second insulating film covering the first layered structure covered by the first insulating film in the element area, and exhibiting a second etching rate with respect to the etching recipe, the second etching rate being greater than the first etching rate, and a second layered structure situated in the non-element area, wherein the second layered structure includes at least a portion of the first layered structure.
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Japanese Office Action mailed Feb. 24, 2009, issued in corresponding Japanese Application No. 2004-080770.
Fujitsu Semiconductor Limited
Singal Ankush k
Toledo Fernando L
Westerman Hattori Daniels & Adrian LLP
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