Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-03-23
2004-07-27
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S347000, C257S352000, C438S014000, C438S149000, C438S479000
Reexamination Certificate
active
06768175
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for producing a semiconductor substrate such as a silicon-on-insulator (SOI) or a silicon-on-sapphire (SOS), to a semiconductor substrate which is small in dislocation or defect and has a silicon layer having a good surface flatness and a production method thereof. Further, the present invention relates to a semiconductor device formed on the above semiconductor substrate and a production method thereof.
DESCRIPTION OF BACKGROUND ART
Heretofore, as a substrate material having a structure where a single crystal silicon semiconductor layer is formed on an insulator, SOI, SOS or the like is known. In the present specification, including the SOI substrate and SOS substrate, those generically named semiconductor substrates in which a single crystal silicon semiconductor is formed on an insulator layer are referred to as SOI substrates. These substrate materials are widely used in device production, and are superior to ordinary silicon substrate in terms of the following points.
(1) High speed through the reduction of parasitic capacity,
(2) strong to software error,
(3) no latch-up, and
(4) a well process can be omitted.
To realize these advantageous device characteristics, the following prior art SOI substrate production methods are known.
(1) Bonding method: after a silicon single crystal substrate is laminated to another silicon single crystal substrate having a thermally oxidized surface using heat treatment or an adhesive, one-side silicon layer is formed into a thin film using mechanical polishing or chemical etching.
(2) SIMOX (Separation by Ion-implanted Oxide) method: After oxygen ions are implanted on to a silicon substrate, heat treatment is performed to form an embedded SiO
2
(silicon oxide) layer in the silicon substrate.
(3) Solid phase epitaxial growth method: After the surface of a silicon substrate is oxidized, a window is opened in part of the oxide film to expose the silicon substrate, and an amorphous silicon is grown thereon. Next, heat treatment is performed, starting from the part contacting the exposed silicon, and the amorphous silicon layer is crystallized by lateral direction epitaxial growth.
(4) Hetero-epitaxial growth method: On acrystalline oxide or fluoride layer stacked on a silicon substrate or an insulating oxide substrate, a single crystal silicon layer is grown by a CVD method.
However, these methods have both advantages and disadvanteages, and still have problems in productivity and quality. For example, in the boding method, it is necessary to form the silicon substrate itself into a thin film, and it is extremely difficult to etch or polish the silicon substrate to 1 &mgr;m or less with good accuracy and uniformity.
Even though, the SIMOX method has been studied for long time, there is a problem when forming the SiO
2
buried oxide film in the silicon substrate, that is a large amount of oxygen ion must be implanted, which reduces the productivity and increases cost. In addition, there are a lot of crystal defects in the silicon layer and the presence of a defect called a pipe in the embedded oxide film.
In addition, the bonded SOI substrate and the SIMOX substrate have the disadvantages that a device formed thereon (for example a field effect transistor) is low in snap back breakdown voltage tends to generate a kink in current voltage characteristic, and further, negative conduction due to self heating tends to generate, which are problems in quality. The snap back breakdown voltage means that when the device is an PET (field effect transistor), hot carrier generated at the junction of the body and the drain accumulates in the body, and a drain current flows between the drain and body and the source, resulting in a reduced breakdown voltage. The kink is also caused by an accumulation of hot carrier in the body. The negative conduction is a phenomenon that current decreases with increasing voltage. This is generated due to the fact that silicon oxide, which is used as an insulating underlay is low in thermal conductivity. As the gate voltage and the drain voltage increase, heat due to self-heat evolution of FET accumulates, resulting in reduced mobility of the silicon layer.
On the other hand, SOS technology is known as the predecessor of the SOI technology. In the past, SOS substrate has been used mainly in a device requiring radiation tolerance. The SOS substrate, in addition to the advantage of having small parasitic capacity of the SOI substrate, also has a thick insulation layer, so there is the added advantage of having small noise through the substrate. Further, when the FET operates, hot carrier generating at the Junction of the body and drain, i.e., at the interface between the silicon layer and the sapphire layer, immediately recombines, and is thus difficult to accumulate in the body. Therefore, current flowing between the drain and body does not rapidly increase, and the breakdown voltage is not decreased. That is, high snap back breakdown voltage and difficulty of kink generation are important advantages of the SOS substrate. Further, since sapphire is high in thermal conductivity, negative conduction is difficult to generate in the SOS substrate. However, the SOS substrate is produced by heteroepitaxial growth of silicon on the sapphire substrate. Due to the difference in lattice constant or thermal expansion coefficient between the silicon layer and the sapphire substrate (&agr;-Al
2
O
3
), there is the generation of large number of defects and large surface roughness which has been a problem.
As means for solving it, it is known that after the silicon layer is further implanted with silicon ions to make a deep part of the silicon layer amorphous, recrystallization is performed by annealing (U.S. Pat. No. 5,416,043). However, even though using this method, the crystalline defect density is still high as compared with bulk silicon.
Further, it is known to prepare an SOI substrate having a silicon substrate with an intermediate layer such as an oxide layer or a fluoride layer thereon, and a single crystal silicon layer is epitaxially grown on the intermediate layer. For example, the use of &ggr;-Al
2
O
3
in the intermediate layer is disclosed in Japanese Patent Application Laid-open No. 1-261300. It is expected that in these SOI substrates, the carrier lifetime is short at the interface of the silicon layer and the intermediate layer, a high snap back breakdown voltage same as SOS is obtained, and kink is difficult to generate. However, a reduction in the crystallinity of the silicon layer or an increase of surface roughness caused by the difference in the lattice constant or thermal expansion coefficient is still a problem.
Still further, there is a problem in that in the silicon layer of these SOS substrate and SOI substrate, crystal defect density becomes higher towards the interface with the insulating underlay, and crystallinity is reduced. Therefore, as in the case, for example, when a high-speed, low power-consumption device is formed on: these substrates, in a thin silicon layer with a thickness of 0.05 to 0.3 &mgr;m, a very large number of crystalline defects are included, and crystallinity is also degraded.
Therefore, the SOS substrate using a sapphire substrate, or the SOI substrate utilizing an intermediate layer such as an oxide layer or fluoride layer stacked on the silicon substrate, has inferior crystallinity of the silicon layer or surface flatness when compared with the bonded SOI substrate or SIMOX substrate. For example, when a semiconductor device, such as a MOSFET (metal-oxide-semiconductor field effect transistor) is formed on these substrates, there is flicker noise, and a degradation in the FET operation characteristics or reliability such as a decrease of breakdown voltage of the gate oxide film, a reduction in effective mobility or trans-conductance, an increase of leakage current and the like.
As a technique for improving the surface flatness of the silicon layer, a method is known in which a bonded SOI substrate of which the insulator
Matsui Masahiro
Morishita Takashi
Asahi Kasei Kabushiki Kaisha
Birch & Stewart Kolasch & Birch, LLP
Soward Ida M.
Zarabian Amir
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