Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2007-10-30
2009-11-03
Smoot, Stephen W (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S241000, C438S243000, C257SE21652
Reexamination Certificate
active
07611931
ABSTRACT:
A semiconductor structure for a dynamic random access memory (DRAM) cell array that includes a plurality of vertical memory cells built on a semiconductor-on-insulator (SOI) wafer and a body contact electrically coupling a semiconductor body and a semiconductor substrate of the SOI wafer. The semiconductor body includes a channel region for the access device of one of the vertical memory cells. The body contact, which extends through a buried dielectric layer of the SOI wafer, provides a current leakage path that reduces the impact of floating body effects upon the vertical memory cell. The body contact may be formed by etching a via that extends through the semiconductor body and buried dielectric layer of the SOI wafer and extends into the substrate and partially filling the via with a conductive material that electrically couples the semiconductor body with the substrate.
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Cheng Kangguo
Divakaruni Ramachandra
Mandelman Jack Allan
International Business Machines - Corporation
Smoot Stephen W
Wood Herron & Evans LLP
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