Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2007-05-15
2007-05-15
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S287000, C438S785000
Reexamination Certificate
active
11066887
ABSTRACT:
Semiconductor structures, and methods for fabricating semiconductor structures, comprising high dielectric constant stacked structures are provided. A stacked dielectric structure (16) in accordance with one exemplary embodiment of the present invention has a first amorphous dielectric layer (18) comprising HfXZr1-XO2, where 0≦X≦1. An amorphous interlayer (20) overlies the first amorphous dielectric layer. The interlayer has a net dielectric constant that is approximately no less than the dielectric constant of HfZrO4. A second amorphous dielectric layer (22) overlies the interlayer. The second amorphous dielectric layer comprises HfYZr1-YO2, where 0≦Y≦1. The stacked dielectric structure (16) has a net dielectric constant that is approximately no less than the dielectric constant of HfZrO4.
REFERENCES:
patent: 6392257 (2002-05-01), Ramdani et al.
patent: 6407435 (2002-06-01), Ma et al.
patent: 6562491 (2003-05-01), Jeon
patent: 6627503 (2003-09-01), Ma et al.
patent: 6791125 (2004-09-01), Demkov et al.
patent: 6825506 (2004-11-01), Chau et al.
patent: 7045815 (2006-05-01), Yu et al.
patent: 7078785 (2006-07-01), Ciancio et al.
patent: 2005/0142715 (2005-06-01), Sakoda et al.
patent: 2005/0186687 (2005-08-01), Lee et al.
Ushakov et al., “Effect of La and Y on Crystallization Temperatures of Hafnia and Zirconia,” J. Mater. Res., vol. 19, No. 3, Mar. 2004. pp. 693-696.
Jensen et al., “X-ray Reflectivity Characterization of ZnO/Al2O3Multilayers Prepared by Atomic Layer Deposition,” Chem. Mater. 2002, 14, pp. 2276-2282.
Li Hao
Liang Yong
Freescale Semiconductors, Inc.
Ingrassia Fisher & Lorenz
Picardat Kevin M.
LandOfFree
Semiconductor structures and methods for fabricating... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor structures and methods for fabricating..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor structures and methods for fabricating... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3791216