Semiconductor structure with coincident lattice interlayer

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer

Reexamination Certificate

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C438S481000, C438S496000, C438S526000, C438S758000, C257S632000

Reexamination Certificate

active

07960259

ABSTRACT:
A semiconductor structure consistent with certain implementations has a crystalline substrate oriented with a {111} plane surface that is within 10 degrees of surface normal. An epitaxially grown electrically insulating interlayer overlays the crystalline substrate and establishes a coincident lattice that mates with the surface symmetry of the {111} plane surface. An atomically stable two dimensional crystalline film resides on the epitaxial insulating layer with a coincident lattice match to the insulating interlayer. Methods of fabrication are disclosed. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

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