Active solid-state devices (e.g. – transistors – solid-state diode – With means to increase breakdown voltage threshold – In integrated circuit
Patent
1994-07-18
1996-11-26
Limanek, Robert P.
Active solid-state devices (e.g., transistors, solid-state diode
With means to increase breakdown voltage threshold
In integrated circuit
257487, 257491, 257493, 257603, H01L 2358, H01L 29861
Patent
active
055788599
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The invention relates to a semiconductor structure having one or a plurality of lateral, high-blocking semiconductor components in a semiconductor arrangement. The semiconductor arrangement comprises a metalized semiconductor substrate, a dielectric layer contiguous to the semiconductor substrate, an electric, homogeneously doped drift zone disposed above the dielectric layer, and heavily-doped zones of the semiconductor components that are cut into the drift zone from the surface of the semiconductor and are electrically contacted.
A semiconductor structure of this type is known from the essay "Extension of Resurf Principle to Dielectrically Isolated Power Devices" of the conference report Conf. Report. ISPSD 1991, Baltimore, pages 27 to 30. This essay concerns the typical structure of a lateral diode on a dielectrically isolated substrate. Such structures, which are to be categorized under the general term "smart power technology," represent a connecting link between digital controls and power components. This technology permits the integration of logic, protection and diagnosis functions into power components.
An essential point of the discussed technology is the integration of a plurality of power components on a so-called semiconductor wafer, hereinafter to be referred to only as semiconductor, with the individual components being completely isolated from one another.
This isolation is to be executed such that the respective component is electrically isolated with respect to the other contiguous semiconductor regions. The lateral isolation is typically effected in such a way that trenches are etched around the component and subsequently filled with a dielectric. The dielectric isolation parallel to the surface of the semiconductor, that is, in the lateral direction, is effected either by the formation of a p-n junction loaded in the blocking direction, or by the use of a dielectric, such as silicon oxide. The tendency is clearly toward dielectric isolation, because in this technology parasitic elements are avoided and, among other things, a simpler design with increased immunity to interference is possible. The achieved maximum blocking voltages, or breakdown voltages, of the components are above all determined by the isolation capability of the "buried dielectric" and, on the other hand, by the surface properties in the surface regions in which the p-n junctions reach the surface. To avoid a surface breakdown, so-called field plates, among others, are used in the region of the p-n junctions on the surface.
On the other hand, the breakdown voltage is primarily limited in that the entire voltage is created between the substrate, which is typically grounded, and the highly-doped regions of the semiconductor components at high potential, which leads to high field intensities. On the one hand, increasing the thickness of the drift zone in order to step up the breakdown voltage leads to considerable problems, because with an increasing thickness, the expenditure for the lateral isolation by means of isolating etching and subsequent filling with isolation material becomes difficult. On the other hand, to achieve high breakdown voltages, the thickness of the buried dielectric cannot be made arbitrarily large, because otherwise an insufficient dissipation of the power loss must be taken into consideration due to the too-low thermal conductivity; this generally leads to thermal problems during operation of the component. In the use of silicon oxide layers, thicknesses of the dielectric layer in a range of 0.5 to 4.5 .mu.m have proven to still be useful.
To achieve high breakdown voltages for lateral, dielectrically isolated components in semiconductors of silicon having a drift zone thickness of less than 30 .mu.m, different measures were discussed, for example laterally buried dopings on the border surface to the dielectric layer, or additional diffusion areas in the substrate being able to be connected to the dielectrically isolated components. The known solutions, however, have
REFERENCES:
patent: 3411051 (1968-11-01), Kilby
Sin et al: "High Voltage Characteristics of Resurfed Schottky Injection FETs". In: Solid-State Electronics, vol. 32, No. 4, 1989, pp. 317-322.
Huang et al: "Extension of Resurf Principle to Dielectrically isolated Power Devices". In: Conf. Report ISPED 1991, Baltimore, pp. 27-30.
Nakagawa et al: "A Novel High Voltage Device Structure on Thin SOI for VLSIs". In: Japanese Journal of Applied Physics, Int. Conf. on Solid State Devices and Materials 1991, Aug. 27-29, Yokohama, JP, pp. 731-732.
Quin Lu et al: "High Voltage Silicon-on-Insulator (SOI) MOSFETs"; In: Electronic Letters, vol. 25, No. 8, Apr. 13, 1989, Stvenage, GB, pp. 536-537.
Nakagawa et al: "200.degree. C. High-Temperature and High-Speed Operation of 440 V Lateral IGBTs on 1.5 .mu.m thick SOI". 1993, IEEE,pp. 28.5.1.-28.5.4.
Merchant et al: "Realization of High Breakdown Voltage (>700 V) in Thin SOI Devices". 1991, IEEE, pp. 31-34.
Nakagawa et al: "Breakdown Voltage Enhancement for Devices on Thin Silicon Layer/Silicon Dioxide Film". In: IEEE Transactions on Electron Devices, vol. 38, No. 7, Jul. 1991, New York, US, pp. 1650-1654.
Held Raban
Neubrand Horst
Stein Erhard
Wondrak Wolfgang
Daimler-Benz AG
Hardy David B.
Limanek Robert P.
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