Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to conductive state
Reexamination Certificate
2007-05-31
2009-08-11
Wilczewski, M. (Department: 2822)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to conductive state
C438S130000, C438S600000, C438S637000, C438S638000, C257S529000, C257S530000
Reexamination Certificate
active
07572682
ABSTRACT:
A fuse/anti-fuse structure is provided in which programming of the anti-fuse is caused by an electromigation induced hillock that is formed adjacent to the fuse element. The hillock ruptures a thin diffusion barrier located on the sidewalls of the fuse element and the conductive material within the fuse element diffuses into the adjacent dielectric material. The fuse element includes a conductive material located within a line opening which includes a first diffusion barrier having a first thickness located on sidewalls and a bottom wall of the line opening. The anti-fuse element includes the conductive material located within a combined via and line opening which includes the first diffusion barrier located on sidewalls and a bottom wall of the combined via and line opening and a second diffusion barrier having a second thickness that is greater than the first thickness located on the first diffusion barrier.
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Edelstein Daniel C.
Hsu Louis L.
Mandelman Jack A.
Yang Chih-Chao
Green Telly D
International Business Machines - Corporation
Jaklitsch, Esq. Lisa U.
Scully , Scott, Murphy & Presser, P.C.
Wilczewski M.
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