Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-06-03
1998-10-06
Dutton, Brian
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
H01L 213205, H01L 214763
Patent
active
058175709
ABSTRACT:
The MOS transistor has field plates and a subarea of the gate formed from the same polysilicon layer. A gate oxide lying underneath them is produced at the beginning of the fabrication process and it therefore exhibits particularly high quality. The polysilicon in the active area is raised to the same level as the adjoining field oxide areas, resulting in a planar topology.
REFERENCES:
patent: 4574468 (1986-03-01), Slotboom et al.
patent: 5376678 (1994-12-01), Hsu et al.
"Improved Narrow Trench Profile Using A Composite Spacer Process" (Garling et al.), Motorolla, Aug. 1996, p. 143.
Kerber Martin
Schwalke Udo
Dutton Brian
Greenberg Laurence A.
Lerner Herbert L.
Siemens Aktiengesellschaft
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