Semiconductor structure design and process visualization through

Details Semiconductor structure design and process visualization through Semiconductor structure design and process visualization through

1996-09-24

1999-05-04

Teska, Kevin J.

Boots, shoes, and leggings

364578, 36446804, 345334, 345340, 345352, 345420, G06F 1750, G06F 1900

Patent

active

059010622

ABSTRACT:
A semiconductor structure design and process visualization tool (10). A main menu (30) allows a user to add, edit or delete process steps (16a-f) to create a process flow in process flow window (12). Main menu (30) provides a set of process models to be selected from. The set of process models are simple first-order geometric models that require only physical parameters of a resulting device layer. Specific process conditions are not required. Semiconductor process and wafer representation tool applies the physical parameters to the corresponding process model to quickly create a cross-section (20) in cross-section window (22) corresponding to a selected process step (16d) in process flow window (12).

REFERENCES:
patent: 5546312 (1996-08-01), Mozumder et al.
patent: 5644688 (1997-07-01), Leon et al.
Durbeck et al.("A System for semiconductor process specification", IEEE Transactions on Semiconductor Manufacturing, vol. 6, No. 4, pp. 297-305, Nov. 1993).
Gopalarao et al. ("An Integrated Technology CAD system for process and device designers", IEEE Transactions on Very Large Scale Integration
Giles et al. ("Semiconductor wafer representation for TCAD", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 13, No.1, pp. 82-95, Jan. 1994).

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