Semiconductor structure and method of manufacture

Details Semiconductor structure and method of manufacture Semiconductor structure and method of manufacture

2011-02-15

2011-02-15

Nguyen, Cuong Q (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S347000, C257SE29287, C438S021000, C438S704000, C438S149000, C438S295000

Reexamination Certificate

active

07888746

ABSTRACT:
In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a semiconductor structure having a silicon-on-insulator (SOI) substrate and a dielectric region is disclosed. The dielectric region is adjacent to the active layer of the SOI substrate and the dielectric region includes a portion of a buried oxide (BOX) layer of the SOI substrate. At least a portion of the dielectric region extends from a surface of the active layer of the SOI substrate to a depth of at least about three microns or greater below the surface of the active layer. Other embodiments are described and claimed.

REFERENCES:
patent: 4888300 (1989-12-01), Burton
patent: 5254491 (1993-10-01), Boland et al.
patent: 5519250 (1996-05-01), Numata
patent: 5541132 (1996-07-01), Davies et al.
patent: 5612244 (1997-03-01), Davies et al.
patent: 5640041 (1997-06-01), Lur et al.
patent: 5641712 (1997-06-01), Grivna et al.
patent: 5688700 (1997-11-01), Kao et al.
patent: 5792706 (1998-08-01), Michael et al.
patent: 5846849 (1998-12-01), Shaw et al.
patent: 6118171 (2000-09-01), Davies et al.
patent: 6153489 (2000-11-01), Park et al.
patent: 6180995 (2001-01-01), Hebert
patent: 6251734 (2001-06-01), Grivna et al.
patent: 6261892 (2001-07-01), Swanson
patent: 6271106 (2001-08-01), Grivna et al.
patent: 6307247 (2001-10-01), Davies
patent: 6455393 (2002-09-01), Swanson
patent: 6489652 (2002-12-01), Jeon et al.
patent: 6498069 (2002-12-01), Grivna
patent: 6503838 (2003-01-01), Swanson
patent: 6512283 (2003-01-01), Davies
patent: 6531376 (2003-03-01), Cai et al.
patent: 6586833 (2003-07-01), Baliga
patent: 6617252 (2003-09-01), Davies
patent: 6621136 (2003-09-01), Grivna
patent: 6661068 (2003-12-01), Durham et al.
patent: 6759746 (2004-07-01), Davies
patent: 6764918 (2004-07-01), Loechelt
patent: 6803317 (2004-10-01), Grivna
patent: 6939788 (2005-09-01), Davies
patent: 6984860 (2006-01-01), Grivna et al.
patent: 7019358 (2006-03-01), Amato
patent: 7078784 (2006-07-01), Davies
patent: 7087925 (2006-08-01), Grivna
patent: 7148533 (2006-12-01), Hsu et al.
patent: 7176524 (2007-02-01), Loechelt et al.
patent: 7202152 (2007-04-01), Davies
patent: 7253477 (2007-08-01), Loechelt et al.
patent: 7256119 (2007-08-01), Grivna et al.
patent: 2002/0064928 (2002-05-01), Houston
patent: 2003/0062588 (2003-04-01), Grivna
patent: 2003/0067014 (2003-04-01), Tsuruta et al.
patent: 2003/0075776 (2003-04-01), Ohkubo et al.
patent: 2003/0160233 (2003-08-01), Rendon et al.
patent: 2004/0099896 (2004-05-01), Zdebel et al.
patent: 2006/0180858 (2006-08-01), Loechelt et al.
patent: 2006/0246652 (2006-11-01), Grivna et al.
patent: 2007/0034947 (2007-02-01), Loechelt et al.
patent: 2007/0075399 (2007-04-01), Grivna
patent: 2007/0093077 (2007-04-01), Grivna
patent: 2007/0148947 (2007-06-01), Davies
patent: 2007/0207582 (2007-09-01), Grivna et al.
patent: 2007/0277875 (2007-12-01), Gadkaree et al.
patent: 1213748 (2002-06-01), None
patent: 2005/059961 (2005-06-01), None
patent: 2008/076651 (2008-06-01), None
Erzgraber, H.B. et al., “A Novel Buried Oxide Isolation for Monolithic RF Inductors on Silicon”,IEDM 98-535, IEEE 1998, (1998), pp. 535-539.
Y, Tan et al., “A SOI LDMOS/CMOS/BJT Technology for Fully-Integrated RF Power Amplifiers”, (May 22, 2000),137-140 Pages.
International Search Report received for PCT Application No. PCT/US2007/086609 mailed on May 15, 2008, 3 pages.

Affiliated with

Also associated with

Rating

Semiconductor structure and method of manufacture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor structure and method of manufacture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor structure and method of manufacture will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2619018