Semiconductor structure and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S048000, C257SE27091, C257SE21521, C257SE29321, C257SE21428, C438S018000, C438S270000

Reexamination Certificate

active

07834394

ABSTRACT:
A semiconductor structure including a substrate, a gate dielectric layer, a gate, a source region and a drain region is provided. The gate dielectric layer is disposed on the substrate. At least one recess is disposed in the substrate. The gate is disposed on the gate dielectric layer and in the recess. The source and drain regions are respectively disposed in the substrate beside the gate.

REFERENCES:
patent: 5122846 (1992-06-01), Haken
patent: 6465842 (2002-10-01), Nishinohara
patent: 7148527 (2006-12-01), Kim et al.
patent: 2009/0020754 (2009-01-01), Suryagandh et al.
Authored by Rasras, et al., article titled “Substrate Hole Current Origin after Oxide Breakdown”, adopted from IEEE 2000, paged 537-540.
Authored by Kaczer, et al., article titled “Potential Vulnerability of Dynamic CMOS Logic to Soft Gate Oxide Breakdown”, adopted from IEEE, vol. 24, No. 12, Dec. 2003, paged 742-744.
Authored by Kaczer, et al., article titled “Understanding nMOSFET characteristics after soft breakdown and their dependence on the breakdown location”, adopted from ESSDERC 2002, paged 139-142.

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