Static information storage and retrieval – Read/write circuit – Testing
Patent
1993-10-06
1994-10-18
Mottola, Steven
Static information storage and retrieval
Read/write circuit
Testing
371 212, G11C 1300
Patent
active
053574737
ABSTRACT:
A semiconductor storage system comprises a semiconductor storage element array including a plurality of semiconductor memory elements, a data bus for transferring data to said semiconductor storage element array, an address bus for inputting an address to said semiconductor storage element array, a read/write controller for controlling read/write of the data written to said semiconductor storage element array, an interface control module for controlling a transfer/receipt of data and commands to and from an outside system, a microprocessor for controlling said read/write controller and said interface control module, a defect address memory for storing and outputting information on an address where at least one defective bit exists and an alternate address to be substituted for said address, and a defect address manipulating circuit for substituting said alternate address for said address where said defective bit exists in accordance with an output of said defect address memory.
REFERENCES:
patent: 4223382 (1980-09-01), Thorsrud
patent: 4414665 (1983-11-01), Kimura et al.
patent: 4541090 (1985-09-01), Shriagasawa
patent: 4730320 (1988-03-01), Hidaka et al.
patent: 4903268 (1990-02-01), Hidaka et al.
patent: 4943966 (1990-07-01), Giunta et al.
Baba Hiroshi
Fujita Takashi
Hama Keizo
Mizuno Masahiro
Mitsubishi Denki & Kabushiki Kaisha
Mottola Steven
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