Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2001-05-16
2002-07-16
Nguyen, Tan T. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Bad bit
Reexamination Certificate
active
06421285
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor storage device. More particularly, the present invention relates to a semiconductor device that has a redundancy circuit relieving a defective memory cell.
2. Description of the Related Art
Generally, a DRAM (Dynamic Random Access Memory) is a volatile memory, and is refreshed periodically in order to hold data stored therein.
If a memory cell in the DRAM has a small defect, data stored in the memory cell vanishes at a faster speed than other normal memory cells. In order to prevent the data from vanishing, the DRAM must shorten an interval (a refresh time) to refresh its memory cells.
However, a certain amount of electricity is consumed for refreshing the memory cells. Consequently, a semiconductor storage device whose refresh time is short has a problem consuming a large amount of electricity.
Several related-art technologies are available that replace a defective memory cell with a redundancy memory cell. A more effective replacing method is always being researched to lengthen the refresh time of the DRAM.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a semiconductor storage device. A more particular object of the present invention is to provide a semiconductor storage device having a redundancy function, which can reduce consumed electricity and can be easily manufactured.
The above-described object of the present invention is achieved by a semiconductor storage device, including a redundancy unit that replaces a memory cell with a redundancy memory cell according to redundancy information, if the memory cell has a defect; a plurality of charge storage devices that are programmed to have the redundancy information, each charge storage device having a fixed capacity; a redundancy-information recording unit programming the plurality of charge storage devices to set the redundancy information in the plurality of charge storage devices, by performing dielectric breakdown to the plurality of charge storage devices selectively; a charge supplying unit supplying a fixed charge to the plurality of charge storage devices; and a redundancy control unit that maintains the redundancy information in the plurality of charge storage devices supplied with the fixed charge by refreshing the plurality of charge storage devices, and supplies the redundancy information from the plurality of charge storage devices to the redundancy unit.
The semiconductor storage device according to the present invention reproduces programmed redundancy information just by refreshing the plurality of charge storage devices, thereby achieving a redundancy function with a simple structure. Additionally, the semiconductor storage device can set a refresh time for refreshing the plurality of charge storage devices to a comparatively long period, thereby reducing the consumed electricity.
Other objects, features and advantages of the present invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings.
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patent: 5485425 (1996-01-01), Iwai et al.
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Funatsu Tsuneo
Matsuzaki Yasurou
Arent Fox Kintner & Plotkin & Kahn, PLLC
Fujitsu Limited
Nguyen Tan T.
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