Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1999-09-16
2000-11-28
Elms, Richard
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, 36523006, G11C 700
Patent
active
061543993
ABSTRACT:
According to one embodiment, a semiconductor storage device (100) can provide an enhanced rate of defective sub-word line replacement by independently controlling the activation and deactivation of redundancy sub-word lines (Sw(1,0 to Sw(5,2))). Redundancy sub-word lines (Sw(1,0 to Sw(5,2))) can be connected to different redundancy sub-word drivers (114a to 114e). Sub-word selecting circuits (126-1 to 126-4) can generate 2-bit redundancy sub-word selecting signals S11 to S14 from sub-word selecting signals XN and XT and fuse output signals H11-H14 received from a fuse circuit 124. Redundancy sub-word selecting signals S11 to S14 can independently activate and deactivate redundancy sub-word lines (Sw(1,0 to Sw(5,2))) coupled to redundancy sub-word drivers (114a to 114e).
REFERENCES:
patent: 5373471 (1994-12-01), Saeki et al.
patent: 5581508 (1996-12-01), Sasaki et al.
patent: 5841708 (1998-11-01), Nagata
patent: 5862086 (1999-01-01), Makimura et al.
patent: 5970003 (1999-10-01), Miyatake et al.
Elms Richard
NEC Corporation
Nguyen Hien
Walker Darryl G.
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