Active solid-state devices (e.g. – transistors – solid-state diode – Fet configuration adapted for use as static memory cell
Reexamination Certificate
2005-12-13
2005-12-13
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Fet configuration adapted for use as static memory cell
C257S393000
Reexamination Certificate
active
06975041
ABSTRACT:
A semiconductor storage device with high soft-error immunity is obtained. A semiconductor storage device has SRAM memory cells. NMOS transistors (Q1, Q4) are driver transistors, NMOS transistors (Q3, Q6) are access transistors, and PMOS transistors (Q2, Q5) are load transistors. An NMOS transistor (Q7) is a transistor for adding a resistance. The NMOS transistor (Q7) has its gate connected to a power supply (1). The NMOS transistor (Q7) has one of its source and drain connected to a storage node (ND1) and the other connected to the gates of the NMOS transistor (Q4) and the PMOS transistor (Q5). The resistance between the source and drain of the NMOS transistor (Q7) can be adjusted with the gate length, the gate width, the source/drain impurity concentration, etc., which is, for example, about several tens of kilohms (kΩ).
REFERENCES:
patent: 5373170 (1994-12-01), Pfiester et al.
patent: 5395783 (1995-03-01), Baumann et al.
patent: 5422499 (1995-06-01), Manning
patent: 5465189 (1995-11-01), Polgreen et al.
patent: 6020242 (2000-02-01), Tsai et al.
patent: 6429124 (2002-08-01), Tang et al.
patent: 690 09 157 (1994-09-01), None
patent: 0 432 057 (1991-06-01), None
patent: 5-235301 (1993-09-01), None
patent: 6-188388 (1994-07-01), None
Ross A. Kohler, et al. “SEU Characterization of Hardened CMOS SRAMs Using Statistical Analysis of Feedback Delay in Memory Cells”, IEEE Transactions on Nuclear Science, vol. 36, No. 6, Dec. 1989, pp. 2318-2323.
Hirano Yuuichi
Ipposhi Takashi
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Renesas Technology Corp.
Wilson Allan R.
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