Static information storage and retrieval – Format or disposition of elements
Reexamination Certificate
2006-03-30
2008-12-16
Mai, Son L (Department: 2827)
Static information storage and retrieval
Format or disposition of elements
C365S063000, C257S686000, C257S777000
Reexamination Certificate
active
07466577
ABSTRACT:
A semiconductor storage employs a base substrate (101) having a command/address external terminal group (CA), a data input/output external terminal group (DQ), and a single chip select external terminal (CS), and also comprises a plurality of memory chips (110) to (113) mounted on a base substrate (101), each of which can individually carry out read and write operations. The terminals (CA), (DQ), and (CS) are connected to an interface chip (120). The interface chip (120) has a chip select signal generation circuit that can individually activate a plurality of memory chips (110) to (113) on the basis of an address signal fed by way of the terminal (CA) and on the basis of a chip select signal fed by way of the terminal (CS).
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Anjo Ichiro
Ido Tatemi
Katagiri Mitsuaki
Nagashima Osamu
Osaka Hideki
Elpida Memory Inc.
Hitachi, Ltd., Intellectual Property Group
Mai Son L
McDermott Will & Emery LLP
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