Semiconductor storage device

Details Semiconductor storage device Semiconductor storage device

2007-09-25

2007-09-25

Phung, Anh (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S230050

Reexamination Certificate

active

11318777

ABSTRACT:
An SRAM cell1includes inverters10, 20, N-type FETs32, 34, 36, 38, word lines42, 44, bit lines46, 48, and voltage applying circuits50, 60. The voltage applying circuits50, 60apply a voltage Vddto the word lines42, 44at the time of a read operation of the SRAM cell1. The voltage applying circuits50, 60apply a voltage (Vdd+α) to the word lines42, 44at the time of a write operation of the SRAM cell1. Here, α>0. Namely, the SRAM cell1is configured in such a manner that a voltage applied to word lines42, 44at the time of the write operation is higher than at the time of the read operation.

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patent: 6538954 (2003-03-01), Kunikiyo
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patent: 08-0007574 (1996-01-01), None
patent: 11-007776 (1996-01-01), None
patent: 10-027476 (1998-01-01), None

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