Semiconductor storage device

Details Semiconductor storage device Semiconductor storage device

2006-02-14

2006-02-14

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S189090

Reexamination Certificate

active

06999338

ABSTRACT:
A semiconductor storage device includes first and second additional FETs disposed in parallel on one of potential lines for supplying first and second drive potentials to each SRAM memory cell. When each memory cell is selected, a selection signal is supplied to the gate terminal of the first additional FET through a selection signal supply line to turn on the first additional FET. A bias generation circuit is configured to generate a bias potential and supply it to the gate terminal of the second additional FET. The bias potential is generated to reflect one or both of fluctuations in the potential difference between the first and second drive potentials, and variations in the threshold voltage of FETs included in the cross-feedback circuit of each memory cell.

REFERENCES:
patent: 5303190 (1994-04-01), Pelley, III
patent: 5659513 (1997-08-01), Hirose et al.
patent: 5726944 (1998-03-01), Pelley et al.
Masanao Yamaoka, et al., “A 300MHz25μA/Mb Leakage On-Chip SRAM Module Featuring Process-Variation Immunity and Low-Leakage-Active Mode for Mobile-Phone Application Processor”, 2004 IEEE International Solid-State Circuits Conference, ISSCC 2004, Session 27/SRAM/27.2, 10 Pages.

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