Semiconductor storage apparatus with copy guard function

Details Semiconductor storage apparatus with copy guard function Semiconductor storage apparatus with copy guard function

1997-04-23

1999-07-13

Cabeca, John W.

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

711100, 36518905, 365200, G06F 1200

Patent

active

059241233

ABSTRACT:
For copy guard, an ROM comprises an address data determining circuit, an address sequence monitoring circuit, an error address data generating circuit, and an output selection circuit. The address sequence monitoring circuit monitors the addresses stored in the address data determining circuit and input addresses to determine whether or not the input addresses are in a predetermined sequence of the addresses in the address data determining circuit. The output selection circuit outputs data read from said memory cell array when the address sequence monitoring circuit determines that the address sequence of the input addresses coincides with the predetermined sequence of the addresses stored in the address data determining circuit and outputs error data generated by the error data generating circuit when a determination is made that the sequence of the input addresses does not coincide with the predetermined sequence.

REFERENCES:
patent: 5357467 (1994-10-01), Hayashi
patent: 5396609 (1995-03-01), Schmidt et al.
patent: 5406519 (1995-04-01), Ha
patent: 5428573 (1995-06-01), Watanabe
patent: 5473756 (1995-12-01), Traylor
patent: 5642480 (1997-06-01), Brownlee et al.
patent: 5737566 (1998-04-01), Sparks et al.
patent: 5781627 (1998-07-01), Ikuta et al.

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