Semiconductor static random access memory cell with additional c

Details Semiconductor static random access memory cell with additional c Semiconductor static random access memory cell with additional c

1997-03-27

1998-09-08

Le, Vu A.

Static information storage and retrieval

Systems using particular element

Flip-flop

365174, 365180, H01L 2976

Patent

active

058054979

ABSTRACT:
A semiconductor static random access memory cell is implemented by four field effect transistors formed on a silicon layer over a buried silicon oxide layer and two resistors formed in an inter-level insulating structure; additional capacitors are formed under the buried silicon oxide layer, and are respectively connected to the gate electrodes of the field effect transistors serving as driving transistors of the memory cell so as to enhance the stability of the memory cell without increase the transistor size.

REFERENCES:
patent: 5194749 (1993-03-01), Meguro et al.
patent: 5594270 (1997-01-01), Hiramoto et al.
F. Assaderaghi et al., "A Dynamic Treshold Voltage MOSFET (DTMOS) for Ultra-Low Voltage Operation", IEDM 94, 1994, pp. 809-812.
G. Shahidi et al., "SOI For A 1-Volt CMOS Technology and Application to a 512Kb SRAM with 3.5 ns Access Time", IEDM 93, 1993, pp. 813-816.

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