Semiconductor static memory device with cell grounding means for

Details Semiconductor static memory device with cell grounding means for Semiconductor static memory device with cell grounding means for

1987-09-10

1988-08-30

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

365227, 365230, G11C 700, G11C 800

Patent

active

047681667

ABSTRACT:
A semiconductor static memory device in which the power consumption is minimized. The memory cells are grouped in column blocks and rows. A NAND gate is provided for each such group, with the output of the NAND gate being coupled to the ground terminals of the cells in its group. The input terminals of the NAND gates receive respective row and column block selection signals. A potential generator is provided in each cell for boosting the potential of the ground terminal of the cell above the potential of the word line, less a threshold voltage of one of the access transistors of the cell, when the corresponding block is not selected. The NAND gates set the potential of the ground terminal at ground voltage when both the column block and word line signals applied thereto are in the high state.

REFERENCES:
patent: 4120047 (1978-10-01), Varadi
patent: 4409679 (1983-10-01), Kurafuji et al.
patent: 4455628 (1984-06-01), Ozak et al.
patent: 4542486 (1985-09-01), Anami et al.

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