Semiconductor static memory device

Static information storage and retrieval – Read/write circuit – For complementary information

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36518911, G11C 700

Patent

active

051193353

ABSTRACT:
A semiconductor memory device including a pair of bit lines, a memory cell provided between the pair of bit lines, and a potential difference control device connected to the pair of bit lines. The bit lines include a potential difference therebetween when information stored in the memory cell is read out. The potential difference control device has a transistor control for receiving a first control signal and for responding thereto; thereby, increasing the potential difference between the pair of bit lines up to a predetermined level so as to provide a high speed read-operation and to reliably discriminate a "good" or a "no good" reading when subjected to a screening test.

REFERENCES:
patent: 3995215 (1976-11-01), Chu
patent: 4122549 (1978-10-01), Kinoshita
patent: 4551641 (1985-11-01), Pelley, III
patent: 4739499 (1988-04-01), Simpson
Patent Abstract of Japan vol. 12, No. 359 (P-762) Sep. 27, 1988.

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