Semiconductor RAM device with a single write signal line for one

Details Semiconductor RAM device with a single write signal line for one Semiconductor RAM device with a single write signal line for one

1994-07-08

1995-12-19

Zarabian, A.

Static information storage and retrieval

Addressing

Multiple port access

365156, G11C 700

Patent

active

054775027

ABSTRACT:
In a semiconductor random access memory device having a memory cell array, each of the memory cells includes a flipflop circuit having two opposite terminals as a data holding element. The flipflop circuit is applied with "1" and "0" signals to the two opposite terminals, those applied signals are held at the opposite terminals, respectively. In order to small size the memory device by avoiding use of a pair of write signal lines for writing data signal to the memory cell, the memory cell is provided with an inverter circuit connecting between the two terminals of the flipflop circuit. A data signal is applied to one of two terminals through a single write signal line, while is applied to the other terminal as an inverted signal through the inverter circuit.

REFERENCES:
patent: 4777623 (1988-10-01), Shimazu
patent: 5260908 (1993-11-01), Ueno

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