Semiconductor programmable test arrangement such as an...

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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C326S037000, C327S525000

Reexamination Certificate

active

06259270

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor integrated circuits having a plurality of programmable elements and lesser pluralities of programming elements and addressing elements involved in the programming of the programmable elements and also to methods for programming the programmable elements.
2. Description of the Related Art
Programmable elements are used, for example, to identify semiconductor wafers and even chips divided therefrom. The programmable elements are typically fuses (open when blown) or ‘antifuses’ (shorted by applying excessive current to the antifuse).
While very convenient for identification purposes, circuits including antifuses are demanding increasing proportions of the semiconductor device area, which is area taken away from the desired end functions of the circuits. Typically, each antifuse is selected in accordance with an address signal and a program signal that are respectively applied to the gates of an MOS transistor pair associated with each antifuse. A series connection of the transistor pair means that each transistor must provide a wider current path therethrough than would otherwise be necessary, in order to sink sufficient current while the antifuse is blown. The wider current paths mean that the switching devices each occupy a large area on the associated chip in this era of ever-decreasing size for the functional devices of interest.
It therefore would be desirable to decrease the number of such relatively large programming and address elements, while preserving the informational value of the programmable elements.
SUMMARY OF THE INVENTION
The invention is based on the recognition that some of the programming switches in such a circuit can be replaced by a common switch, or that, alternatively, some of the address switches in such a circuit can be replaced by a common switch. While the term ‘switch’ is used here, it should be understood to be inclusive of the term ‘transistor’.
According to the invention, a semiconductor integrated circuit includes a plurality of programmable elements, each having a first terminal connected to a first power supply potential, and a second terminal. Each of a plurality of first semiconductor switching elements has a first terminal respectively connected to the second terminal of a corresponding one of the plurality of programmable elements and has a second terminal. Each of a plurality of second semiconductor switching elements has a first terminal connected in common to selected ones of the second terminals of the plurality of first semiconductor switching elements and has a second terminal connected to a second power supply potential.
In a preferred implementation of the invention, the pluralities of programmable elements and first semiconductor switching elements are arranged in respective pluralities of subgroups such that each subgroup of first semiconductor switching elements is associated with a corresponding subgroup of programmable elements, and each first terminal of the second semiconductor switching elements is connected to the second terminals of a corresponding one of the first semiconductor switching elements within each of the plurality of subgroups of the first semiconductor switching elements.
In another implementation of the invention, the pluralities of programmable elements and first semiconductor switching elements are arranged in respective pluralities of subgroups such that each subgroup of first semiconductor switching elements is associated with a corresponding subgroup of programmable elements, and each first terminal of the plurality of second semiconductor switching elements is connected in common to the second terminals of a corresponding subgroup of the first semiconductor switching elements.
According to another aspect of the invention, a method is provided for programming a plurality of programmable elements grouped in a plurality of groups and subgroups. The method includes the steps of applying a programming signal to the subgroups in a respective one of the groups and applying an address signal at like respective terminals in each of said groups, with each which terminal there is associated one of said programmable elements, either the programming signal or the address signal being applied by a common switching element.
Additional features and advantages of the invention will be set forth in the description which follows and in part will be apparent from the description, or may be learned by practicing the invention. The advantages of the invention will be realized and attained by the apparatus, systems and method particularly pointed out in the following written description, drawings, and claims.
The following detailed description is both exemplary and provides further explanation of the claimed invention. The accompanying drawings also provide a further understanding of the invention and illustrate several embodiments of the invention. Together with the description, the drawings also explain the principles of the invention.


REFERENCES:
patent: Re. 36952 (2000-11-01), Zagar et al.
patent: 4689494 (1987-08-01), Chen et al.
patent: 5099149 (1992-03-01), Smith
patent: 5293339 (1994-03-01), Suzuki et al.
patent: 5418487 (1995-05-01), Armstrong, II
patent: 5446402 (1995-08-01), Yoshimori
patent: 5654649 (1997-08-01), Chua
patent: 5661323 (1997-08-01), Choi et al.
patent: 5945840 (1999-08-01), Cowles et al.
patent: 6028444 (2000-02-01), Wong et al.
patent: 6127845 (2000-10-01), Kolze et al.
patent: 6133778 (2000-10-01), Kim et al.

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