Semiconductor processing system with ultra low-K dielectric

Details Semiconductor processing system with ultra low-K dielectric Semiconductor processing system with ultra low-K dielectric

2006-12-19

2009-11-24

Cao, Phat X (Department: 2813)

Semiconductor device manufacturing: process

Radiation or energy treatment modifying properties of...

C438S780000, C257SE21077

Reexamination Certificate

active

07622403

ABSTRACT:
A semiconductor processing system with ultra low-K dielectric is provided including providing a substrate having an electronic circuit, forming an ultra low-K dielectric layer, having porogens, over the substrate, blocking an incoming radiation from a first region of the ultra low-K dielectric layer, evaporating the porogens from a second region of the ultra low-K dielectric layer by projecting the incoming radiation on the second region, and removing the ultra low-K dielectric layer in the first region with a developer.

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Jeffrey M. Catchmark, Guy P. Lavallee, Michael Rogosky, and Youngchul Lee, “Direct Sub-100-nm Patterning of an Organic Low-k Dielectric for Electrical and Optical Interconnects,” Journal of Electronic Materials, vol. 34, No. 3, 2005.

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