Semiconductor processing methods of forming substrate features,

Details Semiconductor processing methods of forming substrate features, Semiconductor processing methods of forming substrate features,

1998-09-03

2000-02-15

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

216 39, 438723, H01L 2100

Patent

active

060252766

ABSTRACT:
Semiconductor processing methods of forming substrate features, e.g. openings, and in particular, methods of forming contact openings are described. In one embodiment, a pair of openings are formed in a first layer over a substrate to first selected depths defined by respective opening bases. A second layer is formed within the openings and over the opening bases. The second layer has different thicknesses relative to the bases over which it is formed. A portion of the base of only one of the openings is exposed through the second layer, and material elevation ally there below is removed. In another embodiment, the openings are defined by sidewalls which join with the respective bases. The second layer is formed within the openings and over at least some of the sidewalls of each opening and has a different thickness over sidewall portions of each opening which are disposed at common substrate elevations. A portion of one of the opening bases is exposed through the second layer and material there below is removed. In another embodiment, a same material is utilized to form sidewall spacers over a substantial portion of the sidewalls of only one of the openings, and to form a layer over a substantial portion of the base of the other of the openings. Material elevation ally below the base of the one opening is selectively etched relative to material comprising the sidewall spacers, and to a selected second depth which is greater than the first depth.

REFERENCES:
patent: 4985374 (1991-01-01), Tsuji et al.
patent: 5637189 (1997-06-01), Peeters et al.
patent: 5926732 (1999-07-01), Matsuura

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