Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1997-03-18
1999-11-23
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438396, 438253, 438255, H01L 218242
Patent
active
059899735
ABSTRACT:
A semiconductor processing method of providing a conductively doped layer of hemispherical grain polysilicon over a substrate includes, a) providing a layer of conductively doped silicon over the substrate to a thickness greater than about 200 Angstroms; b) depositing an undoped layer of non-polycrystalline silicon over the doped silicon layer to a thickness of from 100 Angstroms to about 400 Angstroms; c) positioning the substrate with the doped silicon and undoped non-polycrystalline silicon layers within a chemical vapor deposition reactor; d) with the substrate therein, lowering pressure within the chemical vapor deposition reactor to a first pressure at or below about 200 mTorr; e) with the substrate therein, raising pressure within the chemical vapor deposition reactor from the first pressure and flushing the reactor with a purging gas; f) with the substrate therein ceasing flow of the purging gas and lowering pressure within the chemical vapor deposition reactor to a second pressure at or below about 200 mTorr; and g) annealing the substrate having the deposited non-polycrystalline silicon layer in the presence of a conductivity enhancing impurity gas at an annealing temperature of from about 350.degree. C. to about 600.degree. C. and at an annealing pressure of from about 10.sup.4 Torr to about 80 Torr to in situ both diffuse conductivity enhancing impurity into the non-polycrystalline silicon layer and transform the non-polycrystalline silicon layer into a conductively doped hemispherical grain polysilicon layer.
REFERENCES:
patent: 4906590 (1990-03-01), Kanetaki et al.
patent: 5037773 (1991-08-01), Lee et al.
patent: 5290729 (1994-03-01), Hayashide et al.
patent: 5340765 (1994-08-01), Dennison et al.
patent: 5366917 (1994-11-01), Watenabe et al.
patent: 5407534 (1995-04-01), Thakur
patent: 5418180 (1995-05-01), Brown
patent: 5444013 (1995-08-01), Akram et al.
patent: 5518948 (1996-05-01), Walker
patent: 5583070 (1996-12-01), Liao et al.
patent: 5597754 (1997-01-01), Lou et al.
patent: 5639685 (1997-06-01), Zahurak et al.
patent: 5639689 (1997-06-01), Woo
patent: 5696014 (1997-12-01), Figura
patent: 5723887 (1998-03-01), Tsuchimoto et al.
Schuegraf Klaus F.
Thakur Randhir P.S.
Zahurak John K.
Jr. Carl Whitehead
Micro)n Technology, Inc.
Thomas Toniae M.
LandOfFree
Semiconductor processing method of providing a conductively dope does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor processing method of providing a conductively dope, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor processing method of providing a conductively dope will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1221239