Semiconductor packaging with internal wiring bus

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Reexamination Certificate

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Details

C257S690000, C257SE23060, C438S123000

Reexamination Certificate

active

07911053

ABSTRACT:
A packaged semiconductor includes inner bond fingers, at least first and second semiconductor dies, and an interposer. The packaged semiconductor further includes wiring between the first and second semiconductor dies and the inner bond fingers, wiring between the interposer and the inner bond fingers, and wiring between the interposer and the first and second semiconductor dies. The wiring between the interposer and the first and second semiconductor dies thereby reduces the count of inner bond fingers needed for the wiring between the first and second semiconductor dies and the inner bond fingers. The interposer further provides indirect access to the inner bond fingers when the inner bond fingers are inaccessible by the first and second semiconductor dies.

REFERENCES:
patent: 5528083 (1996-06-01), Malladi et al.
patent: 5715147 (1998-02-01), Nagano
patent: 5757070 (1998-05-01), Fritz
patent: 5789816 (1998-08-01), Wu
patent: 6603072 (2003-08-01), Foster et al.
patent: 7208826 (2007-04-01), Sakamoto et al.
patent: 2003/0162382 (2003-08-01), Aono et al.
patent: 2003/0189258 (2003-10-01), Uchida
patent: 2005/0253278 (2005-11-01), Lam et al.
patent: 2007/0045809 (2007-03-01), Wheless, Jr. et al.
patent: 196 48 492 (1997-11-01), None
patent: 1 160 866 (2001-12-01), None
patent: WO 2004090977 (2004-10-01), None

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