Semiconductor packaging structure

Details Semiconductor packaging structure Semiconductor packaging structure

2001-10-12

2004-03-09

Coleman, W. David (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With window means

Reexamination Certificate

active

06703700

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor packaging structure, and more particularly to an improved semiconductor packaging structure that is easy to fabricate, incurs a low production cost and has a good heat dissipation.
2. Description of Related Art
With reference to
FIG. 13
a conventional semiconductor packaging structure for sensing optical signals, such as a charge coupled device (CCD) or a photoelectric element, has a substrate (
50
) defined with a groove (
51
) in the middle portion of the substrate (
50
), wherein a chip (
52
) is mounted on the substrate (
50
). The substrate (
50
) further has multiple traces (not shown) arranged thereon, and the chip (
52
) is electrically connected to the multiple traces via multiple gold wires (
53
). Then a transparent cover (
54
) covers the groove (
51
) for protecting the chip (
52
).
In general, the substrate (
50
) used in foregoing semiconductor packaging is formed of ceramic material. The advantage of the ceramic material is that the ceramic material would not absorb the moisture in the air, so that the chip (
52
) enclosed in the substrate (
50
) would not be affected by the moisture, and is able to work stably. However, ceramic material is expensive and difficult to process. Therefore, another conventional semiconductor packaging structure is disclosed.
With reference to
FIG. 14
, the packaging structure is substantially the same as that shown in
FIG. 13
, wherein the packaging structure shown in
FIG. 14
comprises a substrate (
60
) made of epoxy resin, such as BT, a wall portion (
61
) installed on the periphery of the substrate to define a groove (
62
) for receiving a chip (
63
) mounted on the substrate (
60
), and a plurality of leads (
64
) arranged on a top surface of the substrate (
60
) and extending to pass through a lateral side of the substrate (
60
) to a bottom surface of the substrate (
60
). The chip (
60
) is further electrically connected to the plurality of leads (
64
) via multiple gold wires (
65
). A transparent cover (
66
) covers the groove (
62
) to enclose the chip (
63
). Although such a semiconductor packaging structure is easy to process and is able to reduce the production cost, the packaging structure still has some shortcomings as listed below.
1. Since the substrate is made of an epoxy resin, the substrate is easy to absorb moisture, and the chip mounted on the substrate would be affected by the moisture, so that the stability of the chip is reduced.
2. The plurality of leads on the substrate is formed by an electroplating process, such that the reliability of forming the leads is hard to control.
3. The efficiency of heat dissipation of the epoxy resin substrate is much lower than a substrate made of metal.
4. Since the plurality of leads on the substrate extends from the top surface of the substrate and passes through a lateral side of the substrate to a bottom surface of the substrate, thus the signal conducting path is very long, and the long path may delay the signal conducting.
To overcome the shortcomings, the present invention tends to provide a semiconductor packaging structure so as to mitigate and obviate the aforementioned problems.
SUMMARY OF THE INVENTION
The primary objective of the invention is to provide a semiconductor packaging structure that is easy to fabricate, is able to reduce the production cost, has a high efficiency of heat dissipation and is able to mitigate a signal delay.
Other objects, advantages and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 3768986 (1973-10-01), Ramos et al.
patent: 4303934 (1981-12-01), Stitt
patent: 5200367 (1993-04-01), Ko
patent: 5343076 (1994-08-01), Katayama et al.
patent: 5382546 (1995-01-01), Yamada et al.
patent: 6384472 (2002-05-01), Huang
patent: 6476469 (2002-11-01), Hung et al.
patent: 2002/0089025 (2002-07-01), Chou

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