Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
2007-09-17
2010-12-07
Parekh, Nitin (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257S773000, C257SE23020
Reexamination Certificate
active
07847419
ABSTRACT:
The semiconductor package includes: a semiconductor chip module having multiple adjacently arranged or integrally formed semiconductor chips each with a bonding pad group and a connection member electrically connecting each of the bonding pads included in the first bonding pad group to the corresponding bonding pad in the second bonding pad group. In the present invention pad parts can be formed on the outside of the semiconductor chip module to conform with the standards of JEDEC. These pad parts are then connected to the semiconductor chips bonding pads through re-distribution layers. The pad parts of the semiconductor package can then conform to the JEDEC standards even while having a semiconductor chip with bonding pads smaller than the standards.
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Park Shin Young
Yang Seung Taek
Hynix / Semiconductor Inc.
Ladas & Parry LLP
Parekh Nitin
LandOfFree
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