Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Reexamination Certificate
2006-10-31
2009-12-08
Chambliss, Alonzo (Department: 2892)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
C257S686000, C257S693000, C257S787000, C257SE23031, C257SE23043, C361S773000, C361S813000, C438S123000
Reexamination Certificate
active
07629677
ABSTRACT:
Provided is a semiconductor package including a high integration semiconductor chip and having a minimum area to be mounted on a circuit board. The semiconductor package includes a semiconductor chip, a plurality of inner leads, and an encapsulant. The plurality of inner leads include upper and bottom surfaces and are electrically connected to the semiconductor chip. The encapsulant covers the semiconductor chip and the plurality of inner leads. The upper surfaces of the plurality of inner leads are fixed to the encapsulant, portions of the bottom surfaces of the plurality of inner leads are exposed from the encapsulant, and the bottom surfaces of the plurality of inner leads are disposed at a different height from a bottom surface of the encapsulant.
REFERENCES:
patent: 5602420 (1997-02-01), Ogata et al.
patent: 5625221 (1997-04-01), Kim et al.
patent: 5970320 (1999-10-01), Yamasaki et al.
patent: 6081029 (2000-06-01), Yamaguchi
patent: 6208020 (2001-03-01), Minamio et al.
patent: 6424031 (2002-07-01), Glenn
patent: 6462424 (2002-10-01), Seki et al.
patent: 6650012 (2003-11-01), Takahashi
patent: 6730544 (2004-05-01), Yang
patent: 6753599 (2004-06-01), Kim
patent: 6790711 (2004-09-01), Takahashi
patent: 7279784 (2007-10-01), Liu
patent: 7315077 (2008-01-01), Choi et al.
patent: 2002/0100963 (2002-08-01), Suzuki et al.
patent: 2004/0051168 (2004-03-01), Arai et al.
patent: 2005/0093117 (2005-05-01), Masuda et al.
patent: 2007/0111393 (2007-05-01), Burghout et al.
patent: 59155152 (1984-09-01), None
patent: 09-153561 (1997-06-01), None
patent: 2004-349316 (2004-12-01), None
patent: 2001-0038940 (2001-05-01), None
patent: 10-0331841 (2002-03-01), None
English language abstract for Korean Publication No. 2001-0038940, May 15, 2001.
English language abstract for Korean Publication No. 10-0331841, Mar. 26, 2002.
English language abstract for Japanese Publication No. 09-153561, Jun. 10, 1997.
Ko Jong-Woo
Lee Jeong-Jin
Youn Sun-Pil
Chambliss Alonzo
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
LandOfFree
Semiconductor package with inner leads exposed from an... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor package with inner leads exposed from an..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor package with inner leads exposed from an... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4077370