Semiconductor package with a flip chip on a solder-resist...

Details Semiconductor package with a flip chip on a solder-resist... Semiconductor package with a flip chip on a solder-resist...

2007-08-07

2007-08-07

Crane, Sara (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S666000, C257S673000, C257S669000, C257S674000, C257S668000, C257S690000, C257S778000, C257S780000

Reexamination Certificate

active

11014165

ABSTRACT:
A semiconductor package includes a flip chip mounted on a plurality of leads and encapsulated by a molding compound. The upper surfaces of the leads includes a plurality of bump-bonding regions at the fan-in ends of the leads, and the lower surfaces of the leads include a plurality of outer connecting regions at the fan-out ends of the leads. A plurality of indentations are formed at the upper surfaces of the leads and adjacent to the corresponding bump-bonding regions so as to avoid solder contamination on the leads. After molding, the indentations are filled with the molding compound. Preferably, the indentations have a reversed “Ω”-shaped profile to prevent bumps of the flip chip from excessively wetting over the other portions of the leads to firmly fix the fan-in ends of the leads.

REFERENCES:
patent: 6507120 (2003-01-01), Lo et al.
patent: 6750546 (2004-06-01), Villanueva et al.
patent: 6858919 (2005-02-01), Seo et al.
patent: 458385 (2001-10-01), None
patent: 540123 (2003-07-01), None

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