Semiconductor package using chip-embedded interposer substrate

Details Semiconductor package using chip-embedded interposer substrate Semiconductor package using chip-embedded interposer substrate

2008-05-15

2009-12-01

Ha, Nathan W (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257SE23018

Reexamination Certificate

active

07626254

ABSTRACT:
A semiconductor package using a chip-embedded interposer substrate is provided. The chip-embedded interposer substrate includes a chip including a plurality of chip pads; a substrate having the chip mounted thereon and including a plurality of redistribution pads for redistributing the chip pads; bonding wires for connecting the chip pads to the redistribution pads; a protective layer having via holes for exposing the redistribution pads while burying the chip and the substrate; and vias connected to the redistribution pads through the via holes. The semiconductor package including chips of various sizes is fabricated using the chip-embedded interposer substrate.

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patent: 6949818 (2005-09-01), Park
patent: 7053476 (2006-05-01), Karnezos
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patent: 2007/0228544 (2007-10-01), Jung et al.
patent: 2000-294720 (2000-10-01), None
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English language abstract of Korean Publication No. 2000-0011420.
English language abstract of Japanese Publication No. 2000-294720.
English language abstract of Japanese Publication No. 2002-158312.

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