Semiconductor package suitable for high voltage applications

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S676000, C361S702000, C361S704000, C361S712000

Reexamination Certificate

active

10762075

ABSTRACT:
A semiconductor package has a structure in which a leadframe pad to which a semiconductor die is attached and inner leads electrically connected to the leadframe pad are covered by a molded housing, and outer leads extending from the inner leads protrude from a side surface of the molded housing to the outside. The outer leads include a first outer lead disposed in a central portion of the molded housing, second and third outer leads respectively disposed in a right and left of the first outer lead. The second and third outer leads each have bent portions in portions where they are adjacent to the side surface of the molded housing, the bent portions protruding to increase a space between the first outer lead and the bent portions in the molded housing. At least one of the bent portions of the second and third outer leads is covered by an extended portion of the molded housing.

REFERENCES:
patent: 5859387 (1999-01-01), Gagnon
patent: 5990501 (1999-11-01), Hiyoshi et al.
patent: 6043111 (2000-03-01), Furuse
patent: 6255722 (2001-07-01), Ewer et al.
patent: 6476481 (2002-11-01), Woodworth et al.

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