Semiconductor package structure with reduced parasite...

Details Semiconductor package structure with reduced parasite... Semiconductor package structure with reduced parasite...

2006-04-04

2006-04-04

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

C257S924000, C257S778000, C257S691000, C257S786000, C438S108000, C438S171000

Reexamination Certificate

active

07023085

ABSTRACT:
A semiconductor package structure for improving electrical performance and a method for fabricating the same are proposed, in which a substrate having at least one pair of passive component pads is provided, wherein a semiconductor chip is attached on the substrate and a passive component is mounted to the passive component pads to locate between the substrate and the semiconductor chip. Thus, the passive component can electrically connect the chip and the substrate simultaneously without arranging an additional conductive trace layer, thereby improving the electrical performance of the semiconductor package structure and reducing the structure size.

REFERENCES:
patent: 2004/0067605 (2004-04-01), Koizumi
patent: 2005/0007129 (2005-01-01), Pu

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